Execution unit: Difference between revisions
Content deleted Content added
HeyElliott (talk | contribs) Clean up/copyedit |
Attempt to get citations |
||
| Line 5: | Line 5: | ||
}} |
}} |
||
In [[computer engineering]], an '''execution unit''' ('''E-unit''' or '''EU''') is a part of |
In [[computer engineering]], an '''execution unit''' ('''E-unit''' or '''EU''') is a part of a [[Processor (computing)|processing unit]] that performs the operations and calculations forwarded from the [[instruction unit]].<ref>{{Cite web |title=Execution Model Overview |url=https://www.intel.com/content/www/us/en/docs/oneapi/optimization-guide-gpu/2024-1/execution-model.html |access-date=2024-06-23 |website=Intel |language=en}}</ref> It may have its own internal control sequence unit (not to be confused with a [[Central processing unit|CPU]]'s main [[control unit]]), some [[Processor register|register]]s,<ref>{{Cite web |title=AMD Instinct™ MI100 microarchitecture — ROCm Documentation |url=https://rocm.docs.amd.com/en/docs-6.0.0/conceptual/gpu-arch/mi100.html#microarchitecture |access-date=2024-06-23 |website=rocm.docs.amd.com}}</ref> and other internal units such as an [[arithmetic logic unit]],<ref>{{Cite web |title=Intel® Iris® Xe GPU Architecture |url=https://www.intel.com/content/www/us/en/docs/oneapi/optimization-guide-gpu/2023-0/intel-iris-xe-gpu-architecture.html |access-date=2024-06-23 |website=Intel |language=en}}</ref> [[address generation unit]], [[floating-point unit]], [[load–store unit]], [[branch execution unit]]<ref>{{cite web |last=Kanter |first=David |date=November 13, 2012 |title=Intel's Haswell CPU Microarchitecture |url=https://www.realworldtech.com/haswell-cpu/4/ |website=Real World Tech}}</ref> or other smaller and more specific components, and can be tailored to support a certain [[Data type|datatype]], such as [[Integer|integers]] or [[Floating-point arithmetic|floating-points]].<ref>[https://web.archive.org/web/20131231145405/http://people.cs.umass.edu/~weems/CmpSci535/Discussion10.html "Execution Unit" discussion from the University of Massachusetts Amherst], archived on the [[Wayback Machine]]</ref> |
||
It is common for modern |
It is common for modern processing units to have multiple parallel functional units within its execution units, which is referred to as [[Superscalar processor|superscalar]] design.<ref>{{Cite web |last=Cohen |first=William |date=2016-03-14 |title=Superscalar Execution |url=https://developers.redhat.com/blog/2016/03/14/superscalar-execution |access-date=2024-06-23 |website=Red Hat Developer |language=en}}</ref> The simplest arrangement is to use a single bus manager unit to manage the memory interface, and the others to perform calculations. Additionally, modern execution units are usually [[Instruction pipelining|pipelined]]. |
||
== References == |
== References == |
||
Latest revision as of 03:07, 23 June 2024
 | This article has multiple issues. Please help improve it or discuss these issues on the talk page. (Learn how and when to remove these messages)
|
In computer engineering, an execution unit (E-unit or EU) is a part of a processing unit that performs the operations and calculations forwarded from the instruction unit.[1] It may have its own internal control sequence unit (not to be confused with a CPU's main control unit), some registers,[2] and other internal units such as an arithmetic logic unit,[3] address generation unit, floating-point unit, load–store unit, branch execution unit[4] or other smaller and more specific components, and can be tailored to support a certain datatype, such as integers or floating-points.[5]
It is common for modern processing units to have multiple parallel functional units within its execution units, which is referred to as superscalar design.[6] The simplest arrangement is to use a single bus manager unit to manage the memory interface, and the others to perform calculations. Additionally, modern execution units are usually pipelined.
References
[edit]- ^ "Execution Model Overview". Intel. Retrieved 2024-06-23.
- ^ "AMD Instinct™ MI100 microarchitecture — ROCm Documentation". rocm.docs.amd.com. Retrieved 2024-06-23.
- ^ "Intel® Iris® Xe GPU Architecture". Intel. Retrieved 2024-06-23.
- ^ Kanter, David (November 13, 2012). "Intel's Haswell CPU Microarchitecture". Real World Tech.
- ^ "Execution Unit" discussion from the University of Massachusetts Amherst, archived on the Wayback Machine
- ^ Cohen, William (2016-03-14). "Superscalar Execution". Red Hat Developer. Retrieved 2024-06-23.
 | This computer-engineering-related article is a stub. You can help Wikipedia by expanding it. |